New recursive algorithm for multidimensional convolution Academic Article

abstract

• This paper presents a novel recursive algorithm for generating higher order m-dimensional (m-D) convolution by combining the computation of 3m identical lower order (smaller size) convolution computations, and its implementation in parallel VLSI networks. The resulting VLSI architectures have very simple modular structure, highly regular topology, and use simple arithmetic units. Additionally, the proposed architectures have very small depth and contain only a single stage of multipliers, while all other stages contain adders only. 1999 IEEE.

authors

• Alnuweiri, Hussein

published proceedings

• IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING

author list (cited authors)

• Elnaggar, A., Alnuweiri, H. M., & Ito, M. R.

citation count

• 4

complete list of authors

• Elnaggar, A||Alnuweiri, HM||Ito, MR

publication date

• May 1999

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• n1057-7130ISSN  Journal

keywords

• Multidimensional Convolution
• Parallel Vlsi Architectures
• Permutation Matrices
• Recursive Architectures
• Tensor Product

Digital Object Identifier (DOI)

• 10.1109/82.769817

start page

• 652

end page

• 654

volume

• 46

issue

• 5

URL

• http%3A%2F%2Fdx.doi.org%2F10.1109%2F82.769817