Technology Scaling Issues of an IDDQ Built-In Current Sensor Conference Paper uri icon

abstract

  • Analysis and comparison of 1.5 m and 350 nm CMOS test chip results of a built-in current sensor design reveal several critical design issues. This paper includes a discussion of these issues. The success of the sensor design hinges on how these issues are addressed in order to achieve successful operation during technology scaling.

name of conference

  • Proceedings. 2005 IEEE International Workshop on Current and Defect Based Testing, 2005. DBT 2005.

published proceedings

  • Proceedings. 2005 IEEE International Workshop on Current and Defect Based Testing, 2005. DBT 2005.

author list (cited authors)

  • Xue, B., & Walker, D.

citation count

  • 1

complete list of authors

  • Xue, Bin||Walker, DMH

publication date

  • January 2005