Testing the path delay faults of ISCAS85 circuit c6288 Conference Paper

abstract

• 2003 IEEE. It is known that the ISCAS85 circuit c6288 contains an exponential number of paths and more than 99% of the path delay faults are untestable. Most ATPG tools, which can efficiently handle other circuits, fail on c6288. The logic structure ofc6288 is studied and the main features, which cause false paths, are revealed. A heuristic, which significantly helps the path delay fault test generation for this circuit, is presented. Experimental results show that our methodology is able to efficiently generate testable paths for c6288.

name of conference

• Proceedings. 4th International Workshop on Microprocessor Test and Verification - Common Challenges and Solutions

authors

• Walker, Duncan

published proceedings

• 4TH INTERNATIONAL WORKSHOP ON MICROPROCESSOR TEST AND VERIFICATION: COMMON CHALLENGES AND SOLUTIONS, PROCEEDINGS

author list (cited authors)

• Qiu, W. Q., & Walker, D.

citation count

• 4

complete list of authors

• Qiu, WQ||Walker, DMH

publication date

• January 2003

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• Proceedings - International Workshop on Microprocessor Test and Verification  Journal

keywords

• 40 Engineering
• 4008 Electrical Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/MTV.2003.1250258

International Standard Book Number (ISBN) 10

• 0-7695-2045-6

start page

• 19

end page

• 24

volume

• 2003-January

URL

• http%3A%2F%2Fdx.doi.org%2F10.1109%2Fmtv.2003.1250258