Requirements for practical I-DDQ testing of deep submicron circuits
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abstract
2000 IEEE. This paper describes the requirements that quiescent current (IDDQ) testing must meet in order to continue being useful in the face of rising background currents. Using projections from the 1999 International Technology Roadmap for Semiconductors, several different techniques are evaluated to determine their usefulness in future technologies.
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Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637)