An Enhanced CAM Architecture to Accelerate LZW Compression Algorithm Conference Paper uri icon

abstract

  • This paper presents efficient hardware architecture for Lempel-Ziv-Welch (LZW) data compression algorithm that can perform both encoding and decoding operations simultaneously using a CAM array. An enhanced CAM cell design has been proposed to achieve search and twofold store operations in single access during regular match operations. The proposed architecture utilizes these enhanced CAM cells to accelerate the implementation of the LZW algorithm. The performance of the proposed design is evaluated using the Corpus benchmarks, where on an average a performance improvement of 53x is achieved when compared to the software approach. 2007 IEEE.

name of conference

  • 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)

published proceedings

  • 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)

author list (cited authors)

  • Samanta, R., & Mahapatra, R. N.

citation count

  • 11

complete list of authors

  • Samanta, Rupak||Mahapatra, Rabi N

publication date

  • January 2007