An Infrastructure Ip for Online Testing of Network-On-Chip Based Socs Conference Paper uri icon


  • To address the reliability concerns that affect the lifetime of complex systems-on-a-chip (SoC) designs, a concurrent on-line SoC test scheme is essential to circumvent the prohibitive costs - test time and test power - associated with off-line SoC test. A Test Infrastructure IP (TI-IP) is deployed within the networkon-chip (NoC) based SoC design to provide on-line test support while managing the intrusion of test into the executing applications within the system. This research describes the architecture and operation of a TI-IP capable of testing SoCs and demonstrates its operation in two SoC test configurations developed using research domain application and test benchmarks. 2007 IEEE.

name of conference

  • 8th International Symposium on Quality Electronic Design (ISQED'07)

published proceedings

  • 8th International Symposium on Quality Electronic Design (ISQED'07)

author list (cited authors)

  • Bhojwani, P., & Mahapatra, R. N.

citation count

  • 6

complete list of authors

  • Bhojwani, Praveen||Mahapatra, Rabi N

publication date

  • March 2007