Different operational transconductance amplifier topologies for obtaining very small transconductances Academic Article

abstract

• A family of CMOS Operational Transconductance Amplifiers (OTA's) have been designed for very small GM's (of the order of nA/V) in the moderate inversion region of operation using several design schemes such as current division, floating gate input stages and bulk driven techniques. A detailed comparison has also been made among these schemes in terms of performance characteristics such as power consumption, active silicon area and signal to noise ratio (SNR). The design has been sent for fabrication in a 1.2 NWELL CMOS Process with a power supply of 2.7 V.

authors

• Silva-Martinez, Jose

published proceedings

• ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL IV

author list (cited authors)

• Veeravalli, A., Sanchez-Sinencio, E., & Silva-Martinez, J.

citation count

• 6

complete list of authors

• Veeravalli, A||Sanchez-Sinencio, E||Silva-Martinez, J

publication date

• January 2000

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE International Symposium on Circuits and Systems  Journal

Digital Object Identifier (DOI)

• 10.1109/iscas.2000.858720

start page

• 189

end page

• 192

volume

• 4

URL

• http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=18601