Hardware Implementation of Corner2 Lossless Compression Algorithm for Maskless Lithography Systems Conference Paper uri icon


  • The data delivery throughput of maskless lithography systems can be improved by applying a lossless image compression algorithm to the layout images and using a lithography writer that contains a decoding circuit packed in single silicon to decode the compressed image on-the-fly. In our past research we have introduced Corner2, a layout image compression algorithm which achieved significantly better performance in all aspects (compression ratio, encoding/decoding speed, decoder memory requirement) than Block C4. In this paper, we present the synthesis results of the Corner2 decoder for FPGA implementation. 2012 Copyright SPIE.

name of conference

  • Alternative Lithographic Technologies IV

published proceedings


author list (cited authors)

  • Yang, J., Li, X., & Savari, S. A.

citation count

  • 3

complete list of authors

  • Yang, Jeehong||Li, Xiaohui||Savari, Serap A

editor list (cited editors)

  • Tong, W. M.

publication date

  • January 2012