CMOS Distributed Amplifiers With Extended Flat Bandwidth and Improved Input Matching Using Gate Line With Coupled Inductors
Overview
Research
Identity
Additional Document Info
Other
View All
Overview
abstract
This paper presents a state-of-the-art distributed amplifier with coupled inductors in the gate line. The proposed coupled inductors, in conjunction with series-peaking inductors in cascode gain stages, provide bandwidth extension with flat gain response for the amplifier without any additional power consumption. On the other hand, gate-inductor coupling improves the input matching of the amplifier considerably. The detailed analysis and design methodology for the proposed distributed amplifier are presented. The new four-stage distributed amplifier, fabricated using an IBM 0.18-m complementary-metal-oxide-semiconductor process, achieves a power gain of around 10 dB, input and output return losses better than 16 and 18 dB, respectively, a noise figure of 3.6-4.9 dB, and a power consumption of 21 mW over a 16-GHz flat 1-dB bandwidth. The measured IIP3of the amplifier is between 0.1 and 3.75 dBm across the entire band. 2009 IEEE.