A Highly Efficient and Linear Power Amplifier for 28-GHz 5G Phased Array Radios in 28-nm CMOS
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2016 IEEE. This paper presents the first linear bulk CMOS power amplifier (PA) targeting low-power fifth-generation (5G) mobile user equipment integrated phased array transceivers. The output stage of the PA is first optimized for power-added efficiency (PAE) at a desired error vector magnitude (EVM) and range given a challenging 5G uplink use case scenario. Then, inductive source degeneration in the optimized output stage is shown to enable its embedding into a two-stage transformer-coupled PA; by broadening interstage impedance matching bandwidth and helping to reduce distortion. Designed and fabricated in 1P7M 28 nm bulk CMOS and using a 1 V supply, the PA achieves +4.2 dBm/9% measured Pout/PAE at-25 dBc EVM for a 250 MHz-wide 64-quadrature amplitude modulation orthogonal frequency division multiplexing signal with 9.6 dB peak-to-average power ratio. The PA also achieves 35.5%/10% PAE for continuous wave signals at saturation/9.6 dB back-off from saturation. To the best of the authors' knowledge, these are the highest measured PAE values among published K-and Ka-band CMOS PAs.
IEEE JOURNAL OF SOLID-STATE CIRCUITS
author list (cited authors)
Shakib, S., Park, H., Dunworth, J., Aparin, V., & Entesari, K.
complete list of authors
Shakib, Sherif||Park, Hyun-Chul||Dunworth, Jeremy||Aparin, Vladimir||Entesari, Kamran