Fast timing recovery for linearly and non-linearly modulated systems Conference Paper uri icon

abstract

  • Digital phase-lock loop (PLL) is often used for timing recovery. Some non-data-aided timing error detectors occasionally cause hangup problem in the digital PLL. In this paper we introduce a new two-step anti-hangup timing recovery scheme. By simulations, we show that this enhanced scheme greatly reduces the probability of hangup and speeds up timing recovery for both linearly and nonlinearly modulated systems. ©2004 IEEE.

author list (cited authors)

  • Kai Shi, .., & Serpedin, E.

publication date

  • January 1, 2004 11:11 AM

publisher