On exploring inter-iteration parallelism within rate-balanced multirate multidimensional DSP algorithms

abstract

• Although the notion of the parallelism in multidimensional applications has existed for a long time, it is so far unknown what the bound (if any) of inter-iteration parallelism in multirate multidimensional digital signal processing (DSP) algorithms is, and whether the maximum inter-iteration parallelism can be achieved for arbitrary multirate data flow algorithms. This paper explores the bound of inter-iteration parallelism within rate-balanced multirate multidimensional DSP algorithms and proves that this parallelism can always be achieved in hardware system given the availability of a large number of processors and the interconnections between them.

authors

• Lu, Mi

published proceedings

• IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

author list (cited authors)

• Peng, D. M., & Lu, M.

citation count

• 2

publication date

• January 2005

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

keywords

• Inter-iteration Parallelism
• Multidimensional Data Flow Graph
• Multidimensional Unfolding
• Multirate Signal Processing

Digital Object Identifier (DOI)

• 10.1109/TVLSI.2004.840401

start page

• 106

end page

• 125

volume

• 13

issue

• 1

URL

• http%3A%2F%2Fdx.doi.org%2F10.1109%2Ftvlsi.2004.840401