Single Electron Transistor-Tunable Tunnel Barrier Based Non-Volatile Memory Conference Paper uri icon


  • We propose a novel memory configuration using tunable barrier and estimate its frequency response to engineer ever fast and robust nonvolatile memory devices. A quantum-classical approach proves that the lifetime of the charge stored on the semiconductor quantum dot is considerably higher when compared to the normal floating gate non-volatile memories, and the design also promises very high immunity towards thermal noise. A brief workout presented enables the design of the memory element by subtly modifying an existing single electron transistor design. 2008 IEEE.

name of conference

  • 2008 8th IEEE Conference on Nanotechnology

published proceedings

  • 2008 8th IEEE Conference on Nanotechnology

author list (cited authors)

  • Meka, S., & Seminario, J. M.

citation count

  • 0

complete list of authors

  • Meka, Shiv||Seminario, Jorge M

publication date

  • August 2008