Memory-efficient sum-product decoding of LDPC codes Academic Article

abstract

• Low-density parity-check (LDPC) codes perform very close to capacity for long lengths on several channels. However, the amount of memory (fixed-point numbers that need to be stored) required for implementing the message-passing algorithm increases linearly as the number of edges in the graph increases. In this letter, we propose a decoding algorithm for decoding LDPC codes that reduces the memory requirement at the decoder. The proposed decoding algorithm can be analyzed using density evolution; further, we show how to design good LDPC codes using this. Results show that this algorithm provides almost the same performance as the conventional sum-product decoding of LDPC codes. 2004 IEEE.

authors

• Narayanan, Krishna

published proceedings

• IEEE TRANSACTIONS ON COMMUNICATIONS

altmetric score

• 6

author list (cited authors)

• Sanka, H., & Narayanan, K. R.

citation count

• 21

complete list of authors

• Sanka, H||Narayanan, KR

publication date

• August 2004

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE TRANSACTIONS ON COMMUNICATIONS  Journal

keywords

• Density Evolution
• Gaussian Approximation
• Low-density Parity-check (ldpc) Codes
• Memories
• Sum-product Algorithm
• Threshold
• Turbo-codes

Digital Object Identifier (DOI)

• 10.1109/TCOMM.2004.833016

start page

• 1225

end page

• 1230

volume

• 52

issue

• 8

URL

• http%3A%2F%2Fdx.doi.org%2F10.1109%2Ftcomm.2004.833016