A DSP based technique for high-speed A/D conversion to generate coherently sampled sequences Conference Paper uri icon

abstract

  • This paper presents a digital signal processor (DSP) based device that will digitize a high speed analog signal. The device takes advantage of a new undersampling strategy which employs two clocks, rather than employing a traditional swept delay generator. The random access memory of the DSP and the signal processing capabilities are employed to so that the signal is sampled over an integer number of cycles, thus insuring coherency in the sampled data set. Coherency is important property that eliminates additional unwanted discontinuties in a data set which introduce unwanted artifacts in the signal's spectral content. A picture of our new device is presented in this paper, in addition to laboratory measurements. The results also indicate that the new technique is competitive with solutions that exist in the current literature.

name of conference

  • IMTC 2001. Proceedings of the 18th IEEE Instrumentation and Measurement Technology Conference. Rediscovering Measurement in the Age of Informatics (Cat. No.01CH 37188)

published proceedings

  • IMTC/2001: PROCEEDINGS OF THE 18TH IEEE INSTRUMENTATION AND MEASUREMENT TECHNOLOGY CONFERENCE, VOLS 1-3

author list (cited authors)

  • Yeary, M. B., Fink, R. J., Burns, M., & Guidry, D. W.

citation count

  • 0

complete list of authors

  • Yeary, MB||Fink, RJ||Burns, M||Guidry, DW

publication date

  • January 2001